CM-X300: Hardware: Revision Notes
Rev 1.7 [02.10.2014]
- SMT manufacturability improvement.
Rev 1.6 [07.6.2011]
- DRAM layout and routing has been changed in order to improve CM-X300 DRAM stability.
- WIFI and BLUETOOTH power supplies are now united. (Issue described in CM-X300 ECN-AM20101205-001 is fixed)
- An onboard EEPROM was added to I2C bus.
- CM-X300-C624M-* USB1 XCVR power supply is now DA9030 LDO7 and not LDO18 as in previous CM-X300 board revisions.
- LED DS1 and other board components placement has changed.
For detailed revision information please see the attached document: CM-X300 PCN-AM07062011.zip
Rev 1.41 [12.10.2010]
- Added 1.2K Pull-ups to Power I2C bus
- CPU RTC is now driven by a designated XTAL
- RTC Battery switchover circuit improved
- Standby power consumption decreased.
- WLAN Reset circuitry improved.
- RF Shield added to WLAN+BT Component.
Rev 1.3 [30.6.2009]
- Added support for PXA310 CPU
- ULPI and 6-wire USB transmitters added (enabling USB support om PXA310)
- GPIO 80, 81, 82 now shared with USB host in C624M configuration (cannot be used as GPIO)
- WLAN_ENA and WLAN_RST GPIO's changed to GPIO71 and GPIO70, respectively
- LED GPIO changed to GPIO76
- PMIC’s USB charge pump output connected to CAMI VCC5 pin
- ONE_WIRE routed to PS2_KDAT CAMI pin
- GPIO of revision jumpers changed
- PWM1 (GPIO18) routed to CAMI A pin 51
Rev 1.2 [10.1.2009]
- AC'97 touch screen interrupt connected to CPU
- RTC connected by means of GPIO
- USB1 N/A on CAMI on "W" option modules
- Added DF_SCLK_E to CAMI (CAMI B pin 120)
- SSP interface routed to CAMI connector B
- Jumpers for revision detection added.
- AC'97 bypass to CAMI provided
- Antennae separated from the sockets by jumpers
- Fixed antennae footprints
Rev 1.1 [25.6.2008]
- Support for two MMC sockets provided on CAMI
- WLAN + BT solution implemented by a Wi2Wi combo IC
- CPU’s GPIO pins of MSL interface powered with 3V supply
- AC'97 CODEC connected to an LDO instead of VBAT
- R1 package changed to 0402
- Provided option on PMIC to connect to the regular I2C bus.
- LAN power and Data Flash power separated
- Some power source changes done
- PMIC's ONKEY# routed to CAMI's SUSP_IN
- PMIC's IRQ# and CAMI PMI# routed to CPU's EXT_WAKE pin
- Added LED
- More CPU GPIO's (80..90) routed to CAMI local bus pins
Rev 1.0 [22-Nov-2007]
- Initial release