CM-X270: Hardware: Revision Notes

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CM-X270L

Rev 1.6 [1-May-2009]

  • DM9000 reset bug fixed, RC circuit added for proper reset
  • MMDAT3_GPIO111 disconnected from W2SW interface

Rev 1.5 [27-Jun-2008]

  • W2SW2001 reset and boot-strap fixed

Rev 1.4 [30-May-2008]

  • BGW2xx replaced with the W2SW2001 module
  • NAND flash ALE and CLE signals are gated with NAND_CS
  • NAND_CS is routed out of CPLD. Added U56, U57, U58

Rev 1.3a [5-Feb-2008]

  • Routed CPU GPIO[0] directly to CAMI PME#
  • Fixed BGW211 boot option to support SPI interface
  • Altered SDCLK routing
  • Added more powerful PU/PD to CPU GPIO[0] and GPIO[1]
  • Added a test point for RST_IN signal
  • Connected UCB1400 VADCN to AGND
  • Added a pull-up to MMCLK_WIFI
  • Routed REG/GNT pair 3 to CAMI instead of pair 0
  • Added revision setting RN
  • Added SDCS always active for D128
  • Added PCM_PWE# option for NOR flash



CM-X270W

Rev 1.4 [20-Feb-2009]

  • RTC crystal changed to the new small foot-print type
  • CPLD clock bug detected in 1.3 fixed
  • Separate audio codec crystal added
  • DM9000 reset bug fixed, RC circuit added for proper reset
  • Pull-down added to the Bluetooth enable signal

Rev 1.3 [30-Aug-2008]

  • Wi2Wi WLAN controller added
  • CSR Bluetooth controller added
  • NAND flash control lines buffered with logic gates

Rev 1.23 [12-Aug-2008]

  • Missing nets IDEINT_KP_MKIN0_GPIO100, GPIRQ1_KP_MKIN1_GPIO101 corrected
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