SPI Driver API for CM-T3530

The WinCE demo image includes the SPI driver that allows direct access to the SPI controllers.
The SPI driver is a stream driver that can be accessed using the "SPI" prefix.

SPI driver API

HANDLE SPIOpen(LPCTSTR pSpiName)

Opens an instance of the SPI Driver. Returns a handle that should be used to access the driver

Parameters

• pSpiName - A string that indicates which SPI controller is accessed by this driver instance. Allowed names are:

#define SPI1_DEVICE_NAME         L"SPI1:"    //SPI1
#define SPI2_DEVICE_NAME         L"SPI2:"    //SPI2
#define SPI3_DEVICE_NAME         L"SPI3:"    //SPI3
#define SPI4_DEVICE_NAME         L"SPI4:"    //SPI4

Return Values

NULL indicates failure, otherwise a driver handle is returned.

void SPIClose(HANDLE hContext)

This function closes the handle to the driver

Parameters

• hContext - Handle to an open driver instance

Return Values

None

BOOL SPIConfigure(HANDLE hContext, DWORD address, DWORD config)

This function is used to configure the SPI channel

Parameters

• hContext - Handle to an open driver instance
• address - SPI slave address
• config - The needed value for MCSPI_CHxCONF, you can use the following macros:

/* CHCONF Register Bit values */
//Data are latched on odd-numbered edges of spim_clk.
#define MCSPI_PHA_ODD_EDGES                     (0 << 0)
//Data are latched on even-numbered edges of spim_clk.
#define MCSPI_PHA_EVEN_EDGES                    (1 << 0)

//spim_clk is held high during the active state
#define MCSPI_POL_ACTIVEHIGH                    (0 << 1)
//spim_clk is held low during the active state
#define MCSPI_POL_ACTIVELOW                     (1 << 1)

//Frequency divider for spim_clk (for master device only) 
#define MCSPI_CHCONF_CLKD(x)                    ((x & 0x0F) << 2)

//SPIM_CSX is held high during the active state
#define MCSPI_CSPOLARITY_ACTIVEHIGH             (0 << 6)
//SPIM_CSX is held low during the active state
#define MCSPI_CSPOLARITY_ACTIVELOW              (1 << 6)

//SPI word length (4 <= x && 32 >= x)
#define MCSPI_CHCONF_WL(x)                      (((x-1) & 0x1F) << 7)
#define MCSPI_CHCONF_GET_WL(x)                  (((x >> 7) & 0x1F) +1)

//Transmit/receive modes
#define MCSPI_CHCONF_TRM_TXRX                   (0 << 12) //Transmit and receive mode
#define MCSPI_CHCONF_TRM_RXONLY                 (1 << 12) //Receive-only mode
#define MCSPI_CHCONF_TRM_TXONLY                 (2 << 12) //Transmit-only mode

/*
When enabled, the DMA write request line is asserted when the channel is
enabled and the MCSPI_TXx register of the channel is empty.
*/
#define MCSPI_CHCONF_DMAW_ENABLE                (1 << 14) //enabled
#define MCSPI_CHCONF_DMAW_DISABLE               (0 << 14) //disabled

/**
The DMA Read request line is asserted when the channel is
enabled and a new data is available in the receive register of the
channel.
*/
#define MCSPI_CHCONF_DMAR_ENABLE                (1 << 15) //enabled
#define MCSPI_CHCONF_DMAR_DISABLE               (0 << 15) //disabled

//No transmission on data Line 0 (spim_somi)
#define MCSPI_CHCONF_DPE0                       (1 << 16)
//No transmission on data Line 1 (spim_simo)
#define MCSPI_CHCONF_DPE1                       (1 << 17)
//Input select - Data Line 1 (spim_simo) selected for reception
#define MCSPI_CHCONF_IS                         (1 << 18)
//Turbo mode - Turbo is activated to maximize the throughput for multi-SPI word transfers.
#define MCSPI_CHCONF_TURBO                      (1 << 19)

/**
Manual SPIM_CSX assertion to keep SPIM_CSX for the channel 
active between SPI words (single channel master mode only). 
*/
#define MCSPI_CHCONF_FORCE                      (1 << 20)

/**
Channel 0 only and slave mode only: SPI slave select signal detection.
0x0: Detection enabled only on spim_cs0
0x1: Detection enabled only on spim_cs1
0x2: Detection enabled only on spim_cs2
0x3: Detection enabled only on spim_cs3
*/
#define MCSPI_CHCONF_SPIENSLV(CSn)              ((CSn & 0x03) << 21)

// Defines number of interface clock cycles between CS toggling and first/last edge of SPI clock
#define MCSPI_CHCONF_TCS_0P5_CLOCKS             (0 << 25)
#define MCSPI_CHCONF_TCS_1P5_CLOCKS             (1 << 25)
#define MCSPI_CHCONF_TCS_2P5_CLOCKS             (2 << 25)
#define MCSPI_CHCONF_TCS_3P5_CLOCKS             (3 << 25)

Return Values

None

Remarks

You can read more about the MCSPI_CHCONF register in the OMAP35x Technical reference manual.

DWORD SPIRead(HANDLE hContext, DWORD size, VOID *pBuffer)

This function reads data from the device identified by the open context.

Parameters

• hContext - Handle to an open driver instance.
• size - Number of bytes to be read from the device.
• pBuffer - Pointer to the buffer that receives the data read from the device.

Return Values

The number of bytes read.

Remarks

This operation is only allowed for MCSPI_CHCONF_TRM_RXONLY channels as configured in SPIConfigure.

DWORD SPIWrite(HANDLE hContext, DWORD size, VOID *pBuffer)

This function writes data to the device identified by the open context.

Parameters

• hContext - Handle to an open driver instance.
• size - Number of bytes to write to the device.
• pBuffer - Pointer to the buffer containing the data to write to the device.

Return Values

The number of bytes written.

Remarks

This operation is only allowed for MCSPI_CHCONF_TRM_TXONLY channels as configured in SPIConfigure.

DWORD SPIWriteRead(HANDLE hContext, DWORD size, VOID *pOutBuffer, VOID *pInBuffer)

This function writes and reads data to/from the device identified by the open context.

Parameters

• hContext - Handle to an open driver instance.
• size - Number of bytes to write and read from/to the device.
• pOutBuffer - Pointer to the buffer that receives the data read from the device.
• pInBuffer - Pointer to the buffer containing the data to write to the device.

Return Values

The number of bytes read.

Remarks

• Both buffers must be the same length.
• This operation is only allowed for MCSPI_CHCONF_TRM_TXRX channels as configured in SPIConfigure.